1. Field of the Invention
The present disclosure relates generally to a semiconductor manufacturing method and a semiconductor manufacturing apparatus using the same and, more particularly, to an overlay measuring method and an overlay measuring apparatus using the same.
A claim of priority is made to Korean Patent Application No. 10-2006-0038074, filed Apr. 27, 2006, the disclosure of which is hereby incorporated herein by reference in its entirety.
2. Description of the Related Art
In recent years, there has been a rapid increase in the demand for high-performance electronic devices such as computers and mobile phones. Specifically, there is a demand for smaller size electronic devices that operate at high speeds. Because most electronic devices include semiconductor chips that perform at least a portion of the processing within the device, there is a corresponding increase in demand to develop new semiconductor chips which have high operation speed and high storage capacity, but are yet small in size. Accordingly, there is a movement towards developing semiconductor chips with a high degree of integration, high reliability, and high response speed.
Generally, a semiconductor chip manufacturing process includes a combination of individual unit processes. That is, the chip is subject to a number of discrete processes. Furthermore, the individual unit processes are developed to ensure a high yield rate and throughput. Yet, some errors will inevitably occur during one or more individual unit processes. To this end, efforts are being directed towards researching methods and apparatuses for measuring process errors in individual unit processes. A portion of these efforts is specifically directed to the photolithography process. This is because photolithography, which is an important semiconductor fabrication process, involves frequent variations in processing conditions and processing equipment.
The photolithography process generally involves transferring geometric shapes on a mask to the surface of a silicon wafer. The steps involved in the photolithographic process include wafer cleaning, barrier layer formation, photoresist application, soft baking, mask alignment, exposure and development, and hard-baking. In particular, in the photolithographic process, a photoresist pattern is used as an etching mask to perform patterning of the wafer disposed under the photoresist pattern or of a thin film formed on the wafer.
A reticle is typically used to form an accurate semiconductor pattern on the underlying wafer or thin film formed on the wafer. Specifically, a reticle is used as a pattern mask that allows the photoresist to be selectively exposed and is disposed at a predetermined position. Then, the wafer is aligned to correspond to the position of the reticle. However, under some conditions, the reticle and the wafer may be misaligned. For example, when there is defect in an optical system transmitting light that is incident on the reticle, the reticle and the wafer may be misaligned with respect to each other. Under such conditions, the pattern formed on the wafer may be imprecise. Furthermore, any further patterns formed on the wafer (i.e., patterns formed by following individual processes) will necessarily be imprecise as all additional patterns are aligned with respect to the earlier-formed pattern which was formed imprecisely to being with.
In order to overcome such a problem, reticles used in an exposure process have alignment patterns and overlay patterns formed thereon. Specifically, an alignment pattern is used to align the wafer such that there accurate exposure during the photolithography. Furthermore, the overlay pattern is used to measure whether or not photolithography conditions match each other in the preceding and subsequent processes. In addition, when the reticle is changed, overlay patterns that are formed in the preceding and subsequent processes are overlapped with each other or arranged at predetermined spaces so that they can be compared with each other.
Accordingly, an overlay measuring apparatus measures and compares a difference between the overlay patterns formed in the preceding and subsequent processes and provides a comparison result to an operator or controller of semiconductor fabrication equipment. This comparison result is used by the operator/controller to adjust the semiconductor fabrication equipment so as to form photoresist patterns at accurate positions on the wafer (i.e., precise patterns).
Generally, in a photolithography process, the plurality of overlay patterns are not formed on the same plane. Specifically, each pattern is formed one at a time on a wafer or on a thin film of the wafer. Furthermore, each subsequent pattern is formed on top of a pattern formed during a preceding process. That is, the overlay patterns are stacked on each other such that each overlay pattern is formed on a different plane.
A conventional overlay measuring apparatus includes an optical module which magnifies and projects a plurality of overlay patterns, an imaging unit which acquires image signals corresponding to the projected overlay patterns, and a reading unit. The reading unit performs a number of functions. For example, the reading unit forms images from the image signals acquired by the imaging unit, reads differences in position between overlay pattern images corresponding to the overlay patterns, calculates overlay compensation values, and provides feedback that includes the overlay compensation values, to an exposure unit.
In particular, the optical module irradiates incident light composed of white visible light onto a surface of the wafer and magnifies and projects its reflected light such that the imaging unit can acquire images corresponding to the overlay patterns. Typically, the overlay patterns are formed in trench shape or in protruded block shape with a step of a thin film or photosensitive film formed on the surface of the wafer.
However, the visible light (which has a predetermined wavelength) irradiated from the optical module may be refracted or scattered on an overlay pattern whose line width is close to the wavelength of the visible light. This similarity between the wavelength of the irradiated light and the line width of the overlay pattern may lead to an overlay measurement error. For example, when the incident light composed of white visible light is incident onto the overlay patterns and is refracted or scattered, the reflected light includes at least one of red, blue and green color components. However, the reflected light is processed in black and white. In this process, the imaging unit may distort the entire or at least a portion of the overlay pattern image while processing the reflected light. Accordingly, the reading unit may calculate an incorrect overlay compensation value on the basis of the overlay pattern images that are partially or entirely distorted by the imaging unit. This error in the overlay compensation process may result in a decrease in the yield rate of the photolithography process.
There is therefore a need for systems and methods to provide an accurate overlay compensation value during a semiconductor chip fabrication process. The present disclosure is directed towards overcoming one or more shortcomings associated with the conventional overlay measuring systems and methods.